Sunday, August 28, 2011

Registers & RAM, Activity 1

Took me a while to get my head around the fact that HDL is not a programming language, but is instead trying to model chips.  That means that the wires running from chip to chip are all active at the same time.  It doesn't step through each line like a computer program.  They're all active the same time.

So this took me longer than I expected, but I finished making a Bit.

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